SRAM ＜Semiconductor Device Principles＞

Memory Cell Structure

• 6-Transistor Cell Configuration
• 4-Transistor Cell Configuration (High Resistive Load Cell Type)

Low Power Type to the left, High Density Type to the right.

Data Write Method (see diagram below)

In the Case of '1':

1. Word Line potential is High
2. Assign a potential to the Bit Line (D=Low, D=High)
3. The state of the flip-flop
4. Word Line potential is Low

Data Read Method

In the Case of '1':

1. Word Line potential OFF
2. Bit Line precharge (same potential as D, D)
3. Word Line potential is High
4. If the Bit Line is Low the conditions will be High
5. Amplified by the sense amp

The state of '1' to the left, The state of '0' to the right. '0', '1' stored by the flip flop circuit