BU90R104
35bit LVDS Receiver 5:35 Deserializer

LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70. Data is transmitted seven times (7×) stream and reduce cablenumber by 3 (1 / 3) or less. The ROHM's LVDS has low swing mode to be able to expect further low and Receiver of 4 bits operate to 250MHz. It can be used for a variety of purposes, home appliances such as LCD-TV, business machines such as decoders, instruments, and medical equipment.

Data Sheet Buy * Sample *
* This is a standard-grade product.
For Automotive usage, please contact Sales.

Product Detail

 
Part Number | BU90R104-E2
Status | Recommended
Package | TQFP64V
Unit Quantity | 1000
Minimum Package Quantity | 1000
Packing Type | Taping
RoHS | Yes

Specifications:

Sub Family

LVDS SerDes

Function

Deserializer

Input Signal Type

LVDS

Output Signal Type

LVCMOS

No.of Rx

5

Clock frequency (Min.)[MHz]

8

Clock frequency (Max.)[MHz]

112

Data Rates [Mbps]

784

Parallel Bus Width

35

Supply Voltage(Min.)[V]

2.3

Supply Voltage(Max.)[V]

3.6

Supply Voltage(Typ.)[V]

3.3

Operating Temperature (Min.)[°C]

-40

Operating Temperature (Max.)[°C]

85

Package Size [mm]

12x12 (t=1.3)

Find Similar

Features:

・Five channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs.
・30bits of RGB output data, 5bits of timing and control output data (HSYNC, VSYNC, DE, CTL1 and CTL2) are transmitted available.
・Support clock frequency form 8MHz up to 112MHz.
・Support consumer video format including 480i, 480P, 720P and 1080i as well.
・Support many kinds of PC video formats such as VGA, SVGA, XGA, and SXGA.
・Provide 784 Mbps per 1ch or 3.92Gbps per device throughput rate using 112MHz clock rate.
・User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock.
・30bit LVDS transmitter is recommended to use BU8254KVT.
X

Most Viewed