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How to Suppress the Parallel Drive Oscillation in SiC Modules
SiC MOSFET is new generation power device with many excellent features compared to conventional Si devices, including high voltage, largecurrent, high-speed drive, low loss, and high-temperature stability. In recent years, these excellent characteristics are being utilized in electric vehicles(EVs) that require higher power. In these EVs, power modules with several SiC MOSFET dies connected in parallel are increasingly being used fortraction inverter circuits.
Meanwhile, using such high-speed power devices connected in parallel may cause parallel drive oscillation ( hereinafter “oscillation” ) between thedies. The dies may be destroyed if an oscillation occurs. Therefore, the development of countermeasures to suppress such oscillation has becomea key challenge for the industry.
This application note explains how to suppress oscillations in power modules effectiv
Contents
1.Basic theory
1-1.Mechanism of oscillation
1-2.Approach for suppressing oscillations (improving phase margin)
1-3. Actual parameters affecting the phase margin
2.Parasitic inductances in module Ldd, Lgg, and Lss
2-1. Definition of Ldd, Lgg, and Lss
2-2. Ldd, Lgg, and Lss in module layout
3. Summary
4. References
How to Suppress the Parallel Drive Oscillation in SiC Modules
SiC MOSFET is new generation power device with many excellent features compared to conventional Si devices, including high voltage, largecurrent, high-speed drive, low loss, and high-temperature stability. In recent years, these excellent characteristics are being utilized in electric vehicles(EVs) that require higher power. In these EVs, power modules with several SiC MOSFET dies connected in parallel are increasingly being used fortraction inverter circuits.
Meanwhile, using such high-speed power devices connected in parallel may cause parallel drive oscillation ( hereinafter “oscillation” ) between thedies. The dies may be destroyed if an oscillation occurs. Therefore, the development of countermeasures to suppress such oscillation has becomea key challenge for the industry.
This application note explains how to suppress oscillations in power modules effectiv
Contents
1.Basic theory
1-1.Mechanism of oscillation
1-2.Approach for suppressing oscillations (improving phase margin)
1-3. Actual parameters affecting the phase margin
2.Parasitic inductances in module Ldd, Lgg, and Lss
2-1. Definition of Ldd, Lgg, and Lss
2-2. Ldd, Lgg, and Lss in module layout
3. Summary
4. References
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