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When the drain potential increases in the FET OFF state, there is a chance that the gate potential will rise due to the effects of AC coupling of the gate-drain capacitance. A typical example is a bridge drive connected in series. In order to prevent short-circuit damage due to erroneous ON, we recommend using negative bias. Gate potential rise can also be mitigated by adding gate-source capacitance. In addition, connecting a Miller clamp MOSFET between the gate and source can prevent an increase in gate potential through reliable short-circuit operation. However, please note that malfunctions may occur when driving the Miller clamp MOSFET due to noise.
