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  • For microwire EEPROMs, in the timing chart in the datasheet describes a drop in CS during write operation from the rising edge of the 29th clock to the rising edge of the 30th clock, but what is the time specification?
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  • For microwire EEPROMs, in the timing chart in the datasheet describes a drop in CS during write operation from the rising edge of the 29th clock to the rising edge of the 30th clock, but what is the time specification?
    • There are no special provisions for the 29-30 clock intervals. The clock width is at least 500ns for a max. SK frequency of 2MHz.
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