System PMIC for NXP-i.MX 8M Nano - BD71850MWV (New)
BD71850MWV integrates all power rails required by i.MX 8M Nano processors and system peripherals. In addition to integrate a sequencer compatible with power modes supported by i.MX 8M Nano processors, making it possible to significantly reduce the development time, decrease size, and simplify application design. The power supply circuit of the BD71850MWV, designed specifically for the power supply system of the i.MX 8M Nano processor family, integrates an 6 buck converters, 6 LDOs, and control logic that allows it to supply power not only to the processor, but the required DDR memory as well – all from a single chip. A 1.8V/3.3V power switch for SDXC cards is also built in, along with a 32.768kHz crystal oscillator driver and multiple protection circuits such as output short-circuit, output over-voltage/current, and thermal shutdown. Buck conversion efficiency from 83 to 95% is achieved for 0.7V to 3.3V output, and the wide input voltage range from 2.7V to 5.5V supports a variety of power sources, from batteries to USB, making them ideal for i.MX 8M Nano applications.
Operating Temperature (Min.)[°C]
Operating Temperature (Max.)[°C]
- 6 Buck Regulators
- 2.0 MHz Switching Frequency. (BUCK1, BUCK2, BUCK5, BUCK7, and BUCK8).
- 1.5MHz Switching Frequency. (BUCK6)
- Target Efficiency: 83% to 95%.
- Output Current & Voltage.
BUCK1: 3.0 A, 0.7 V to 1.3 V/10 mV step, DVS
BUCK2: 3.0 A, 0.7 V to 1.3 V/10 mV step, DVS
BUCK5: 3.0 A, 0.70 V to 1.35 V/8steps, DVS
BUCK6: 3.0 A, 2.6 V to 3.3 V/100 mV step
BUCK7: 1.5 A, 1.605 V to 1.995 V/8steps
BUCK8: 3.0 A, 0.8 V to 1.4 V/10 mV step
- 6ch Linear Regulators (6 LDOs)
- LDO1: 10 mA, 3.0 V to 3.3 V, 1.6 V to 1.9 V
- LDO2: 10 mA, 0.9 V, 0.8 V
- LDO3: 300 mA, 1.8 V to 3.3 V
- LDO4: 250 mA, 0.9 V to 1.8 V
- LDO5: 300 mA, 0.8 V to 3.3 V
- LDO6: 300 mA, 0.9 V to 1.8 V
- Power Mux Switch
- 1.8V Input: 500 mΩ(Max)
- 3.3V Input: 500 mΩ(Max)
- 32.768 kHz Crystal Oscillator Driver
- Power Button Detector
- Protection and Monitoring: Soft Start, Power Rails Fault Detection, UVLO, OVP and TSD
- OTP Configurable Power Sequencing
- OTP and Software Programmable Output Voltage, Ramp rates.
- Hardware Signaling with SoC for Transition into or out of Low Power States
- I²C: 100 kHz/400 kHz, 1 MHz
- Power-on Reset Output: POR_B, RTC_RESET_B,
- Watchdog Reset Input: WDOG_B:
- Power State Control: PMIC_STBY_REQ, PMIC_ON_REQ, PWRON_B
- Interrupt to SoC: IRQ_B
- Type3 PCB Applicable