This is when a defect occurs by chance in a memory cell during normal operation, resulting in memory corruption. There are limitations on the number of times an EEPROM memory cell can be rewritten. ROHM guarantees the highest number of rewrites: 1 million times. Companies normally do not normally guarantee a chance defect will not occur within a number of times - they only confirm that all bits are normal at shipping. ROHM has developed double-cell construction to reduce the rate of chance defects for greater data reliability.
The BR93Hxx-WC reduces the lower limit of the operating supply voltage range from 2.7V to 2.5V, increases the data retention period from 40 years to 100 years, raises the SK frequency from 1.25MHz to 2MHz, and reduces the write cycle time from 10ms to 4ms.
In order to prevent erroneous writing during power ON, maintain the state of the input pin until VCC rises by pulling the microwire CS pin to ground, pulling up the SPI CSB pin to VCC, the I²C SDA pin to 'H', and SCL to 'H' or 'L', and adhere to the power supply rise time and voltage stipulated in the datasheet.
The built-in low-voltage write error protection circuit (LVCC circuit) is activated, preventing writing. Power ON precaution: Please start up the Power On Reset (P.O.R.) circuit to ensure normal operation.
Target Products： BR24Lxx Series, BR25Lxx0 Series, BR93Lxx Series