In the ML62Q1000 series Peripheral ConfigurationTool, the timer settings do not seem to match.For example, when setting 50ms, the following code was automatically generated,timer0_setCnt16 ((uint16_t) 0xc332); 0xc332 = 49970Is the following incorrect?timer0_setCnt16 ((uint16_t) 0xc34f); 0xc34f = 49999
In the ML62Q1000 series Peripheral ConfigurationTool, the frequency of Count clock is re-expressed by multiplying the original vibration of 32.768kHz. For example, in the case of 16MHz 32.768kHz x 488 multiplication = 15.990784MHz It will be treated as 15.990784MHz. Therefore, the set value in the timer mode register is 50000μs * 15.990784MHz / 16 division -1 ≒ 0xC332 = 49970 It will be. 15.990784MHz is the theoretical median because the 16MHz of the PLL varies from LSI to individual.
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