Unable to perform UART receiving. What are probable causes?|FAQ|ROHM Semiconductor

FAQ's

Unable to perform UART receiving. What are probable causes?
- The register settings may be incorrect. Check the following settings.
  
  ・ Block Control REGISTERn (BLKCONn) on DUAn bit is set to "0".
  ・ PnmDIR bit on Direction Register (PnDIR) for the port used is set to input of "1".
  ・ UnEN bit of UARTn Control Register is set to "1".
  ・ UnIO bit of UARTn Mode Register is set to the receiving mode of "1".
  ・The baud rate clock is selected to UnCK0/1 bit of UARTn Mode Register.
  ・The baud rate count value is set to the UARTn Baud Rate Register.
  ・EUn bit of Interrupt Enable Register (IEn) is set to the interrupt enable of "1".
  ・Master interrupt enable flag (MIE) is set to "1" with the EI command.
  Related Products: ML610(Q)40x, ML610(Q)42x, ML610(Q)47x, ML610(Q)48x, ML610Q10x, ML610Q11x, ML610Q17x, ML610Q30x, ML610Q35x, ML610Q36x, ML610Q38x, ML610Q41x, ML610Q43x, ML610Q46x, ML620Q13x, ML620Q15x, ML620Q416/ML620Q418, ML620Q503H/ML620Q504H/ML620Q506H, ML62Q12xx, ML62Q13xx, ML62Q14xx, ML62Q15xx/ML62Q18xx, ML62Q16xx, ML62Q17xx