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This is when a defect occurs by chance in a memory cell during normal operation, resulting in memory corruption. There are limitations on the number of times an EEPROM memory cell can be rewritten. ROHM guarantees the highest number of rewrites: 1 million times. Companies normally do not normally guarantee a chance defect will not occur within a number of times - they only confirm that all bits are normal at shipping. ROHM has developed double-cell construction to reduce the rate of chance defects for greater data reliability.
In order to prevent erroneous writing during power ON, maintain the state of the input pin until VCC rises by pulling the microwire CS pin to ground, pulling up the SPI CSB pin to VCC, the I²C SDA pin to 'H', and SCL to 'H' or 'L', and adhere to the power supply rise time and voltage stipulated in the datasheet.
The built-in low-voltage write error protection circuit (LVCC circuit) is activated, preventing writing. Power ON precaution: Please start up the Power On Reset (P.O.R.) circuit to ensure normal operation.
Target Products: BR24Lxx Series, BR25Lxx0 Series, BR93Lxx Series
The BR25H128-2C and BR25H640-2C have the same circuit configuration, but the BR25H128-2C features a larger chip size and wiring delay, resulting in a longer response time.
It means that each byte is guaranteed to hold data for 1 million rewrites. It does not imply the number of rewrites to the IC. Note 1: The number of rewrites depends on the operating temperature conditions. Please consult with the Business Department for information on data reliability. Note 2: There is no relationship between the data retention period and the number of rewrites.