The 4000 series of standard logic ICs features a max. supply voltage of 16V and 18V withstand voltage logic, so at low supply voltages operating speed will slow down and MOS transistor ON resistance increase compared with the 74HC series of low voltage logic ICs.
Since the VDD pin is connected to the chip substrate (N type), it must be kept at the highest potential at all times. When voltage is supplied to other pins while VDD is open, parasitic element(s) may operate, possibly causing deterioration and/or destruction.
The input threshold voltage for switching between 'H' and 'L' is approx. VDD/2 with respect to the supply voltage VDD. VIL becomes 'L' when below 30% of VDD (VIL＜VDD×0.3) and VIH becomes 'H' when above 70% of VDD (VIH＞VDD×0.7). For example, with VDD=3.3V, VIH＞2.31V、VIL＜0.99Ｖ.
Short for Moisture Sensitivity Level, MSL is a JEDEC (Joint Electron Device Engineering Council) standard established for the purpose of preventing device failure due to volumetric expansion of atmospheric moisture introduced into the resin package of semiconductor devices during reflow. The floor life of IC packages, during which the components must be mounted and reflowed after opening the moisture-resistant packaging, is broken down into 8 MSL levels.