Controller IC Employs Real-Time Adaptive Loop Compensation, PMBus
PV3012 utilizes analog and digital functionality to maximize system protection and continuously monitors the health of the power conversion system. It generates fault and warning conditions, protects the power stage, and actively manages system re-start attempts. Under- and over-voltage (UVLO, OVLO) conditions on the input and output are monitored, respectively. Table 1 lists other protection features, including overvoltage protection (OVP), overcurrent protection (OCP), short circuit protection (SCP), lost sense (LOS), over and under temperature protection (UTP and OTP).
The PV3012 also supports Loss of Sense (LOS) fault protection. If the output voltage sense lines to pins VSENP and VSENN (Fig. 2) become disconnected or shorted, it triggers an LOS fault and turns off power regulation to protect the power stage. LOS detection is configurable, through specific commands, from 100 mV to 500 mV below the VOUT setting; the default threshold voltage for LOS detection is 300 mV. The response time is also configurable, through specific commands, from 10 μs to 50 μs; the default response time is 10 μs.
Configuring the PV3012
The PV3012 is equipped with four configuration inputs (CONFIG, VSET, ADDR1, and ADDR2). You can use these inputs to configure PV3012 parameters prior to (or in the absence of any) PMBus communication.
To activate a specific configuration, connect external precision resistors RA1, RA2, RC, and RS1 from the respective configuration input to analog ground (AGND), as shown in Fig. 4. The PV3012 determines the value of configuration resistors by injecting a 10 μA to 80 μA (nominal) current through its configuration pins into these resistors. If no configuration resistors are detected (configuration pin is left floating), the PV3012 remains at its default configuration. Device settings determined by the configuration resistors may be overwritten subsequently by settings retrieved from NVM, which stored them there through PMBus interaction. The PV3012 may be configured for NVM precedence., or through on-going PMBus communication during normal operation.
Inputs ADDR1 and ADDR2 along with resistors RA1 and RA2 assign a PMBus address to a PV3012 slave device. Unique device addresses are required in systems where multiple PMBus devices are connected to a single serial synchronous bus, through lines SDA (data) and SCL (clock). Bus conflicts will occur if more than one device responds to the same PMBus address (other than the broadcast address).
Resistor RC from CONFIG to AGND (Fig. 4) selects one out of the eight possible power supply configurations. Each of the eight configuration tables may consist of up to 32 configuration parameter/value pairs. A single configuration parameter/value pair may be, for example, an assignment of a current limit. Specific RC precision resistor values range from 147kΩ to 75.0kΩ for the eight possible tables.
This single-pin configuration technology allows a single resistor to fully configure a controller for its use in the desired switch-mode power supply. Also, by simply providing a different resistor, the controller can be fully configured according to the requirements of a different design.
Each of the eight configuration tables allows the user access to over 60 parameters, such as VOUT settings, switching frequency, slew rate, VOUT tracking, protection feature set-points, master/slave, etc.
Resistor RS1 from VSET to AGND sets the VOUT set point. There are two procedures to map VOUT. Mapping 1 truncates the output to the nearest 50 mV. Mapping 2 employs resistor RSET in parallel with RS1; this establishes DOSA standard outputs. The RS1 values range from 0 kΩ to 100 kΩ to set VOUT from 0.600 V to 3.300 V, respectively.
Configuration resistors are accessed during the PV3012 power-up process, immediately following the application of the supply voltage (VDD33D, VDD33A) and the built-in self-test (BIST). The typical duration of the configuration phase is less than 10 ms. Once a PV3012 has completed its configuration phase, it ignores the configuration resistors for the remainder of normal operation, or when the PV3012 undergoes a new power-up sequence (i.e., following removing and re-applying VDD33D, VDD33A). To minimize controller power consumption, the configuration measurement currents are turned off during normal operation.
PowerSMART Design Tool
During the design stage, the PV3012's PowerSMART Design Tool allows designers to easily select and program (to the controller's memory) the desired parameters of their configuration table(s). This interface allows the designer to communicate with the digital control IC on the power supply via the designer's computer. The tool runs on the designer's machine and exchanges information over a common USB connection. Evaluation boards are provided with a USB/I2C interface that allows communication with the control IC through its SMBus lines.
Using the design tool, the designer can communicate with the controller IC to receive/monitor information from the power supply and IC, as well as program settings to the controller. The designer can view the power supply's status, input/output voltages, output current, phase current sharing, and fault conditions detected by the controller. The design environment allows configuration and adjustment of more than 60 parameters, such as switching frequency, VOUT, and protection and fault limits.
Digital Reference Design
To implement the IC, Powervation joined forces with Murata Power Solutions to co-develop a reference design for Murata Power Solution's 45 A Power Block (Fig. 5).. For details, see the sidebar, "Murata and Powervation Team Up for Digital Reference Design".
As originally published in PowerElectronics Technology: