Output changes will be delayed, resulting in a delay in reset detection/cancellation. Therefore, please verify that there are no adverse effects due to delayed output changes from power supply fluctuations in the actual set, and take this phenomenon under consideration when selecting circuit constants.
Effects: Unexpected malfunctions may occur (but this is unlikely). The SUB terminal: (BU42xx/BU43xx/BU48xx/BU49xx series) On the chip, since the highest potential is at VDD, the SUB terminal is connected to VDD. (BD45xx/BD46xx/BD47xx/BD48xx/BD49xx/BD52xx/BD53xx series) On the chip, since the lowest potential is at ground, the SUB terminal is connected to ground.
They can be found in the 'mounting specifications' in the external dimensions diagram by clicking on the package link on the relevant product page. Also, please refer to the following. BDxxxxF series/BUxxxxF series: SOP4 BDxxxxg series/BUxxxxg series: SSOP5 BDxxxxFVE series/BUxxxxFVE series: VSOF5