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  • What factors need to be taken into consideration when connecting SiC MOSFETs in series?
    • - The ground isolation of The upper device can only guarantee The dielectric withstand voltage
      - A floating power supply is required for series gate voltages
      - When connected in series, since The temperature coefficient of The on resistance is positive, in order to prevent thermal runaway it is necessary to consider sufficient derating
      - taking into account product variations
      - When used as A single high voltage switch in series it is recommended to implement appropriate voltage dividing measures such as inserting A large resistance in parallel
      - The switch timing must be matched to prevent destruction due to breakdown voltage
    • Products: SiC Power Devices , SiC MOSFET , SiC MOSFET Bare Die
  • Why is there undershoot/overshoot of the gate signal during SiC device drive?
    • The effects of parasitic capacitance and inductance on the board can be considered a type of LC resonance. Please confirm the following items.
      1) External resistance connected to the gate drive circuit
      2) Output capacitance of the gate drive circuit
      3) Parasitic inductance of the gate drive circuit wiring
      4) SiC MOSFET gate capacitance
      5) Internal gate resistance of hte SiC MOSFET etc.
      When the resistance is small the overshoot/undershoot peak value will increase and prolong the ringing decay time.
      Also, when the capacitance is large the peak value deceases, slowing down the switching speed.
      Plus, a larger inductance will cause the inductance to rise.
    • Products: SiC Power Devices , SiC MOSFET , SiC Power Module , SiC MOSFET Bare Die
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