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For NPN transistors, VCEO is in breakdown when positive voltage is supplied to the Collector pin while the Emitter is grounded. Conversely, VCEO in PNP transistors is in breakdown when positive voltage is supplied to the Emitter with Collector grounded. Breakdown in the opposite direction (e.g. NPN: +V to Emitter, Collector grounded) is roughly equivalent to the breakdown between the Emitter and Base. Typically this is between 5 to 7V, making the Collector-Emitter reverse voltage less than 5V. (If sufficient voltage is supplied to the Collector-Emitter in reverse, deterioration such as low hFE will occur. Otherwise leakage current will flow.)
The same applies to digital transistors. Voltages up to 5V can be supplied to the Collector-Emitter in the reverse direction as below. However, current flows through what has resistance between an GND terminal and a IN terminal.
