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The Industry's First SPI-compatible 125℃ Double Cell EEPROMs for Automotive Applications

08.24.2007
SPI-compatible BR25Hxx0 EEPROMs

ROHM has developed the industry's first SPI-compatible BR25Hxx0 EEPROMs (non-volatile memory) for applications exposed to harsh environmental conditions such as automotive ECUs, where damage is a possibility due to surges and static electricity during startup and vibration and heat during operation. Features include double-cell construction, guaranteed operation at 125oC, the industry's highest ESD resistance (6kV), gold pad/gold wire connections, and double reset functionality for high reliability. High redundancy circuits and processes combined with thorough screening and debugging ensure 1 million rewrites at 85°C and 300,000 rewrites at 125oC.
The new lineup consists of 12 models in different packages types and memory capacities.

Sample shipments began in February (1.7US$ each) and mass production is scheduled to start in September

・ Major features of the BR25Hxx0 Series:

  1. Memory cell failures eliminated due to double-cell construction.
  2. Wide operating temperature range: ?40o to +125oC.
  3. High ESD resistance: 6kV typ. (HBM)
  4. Gold pad-Gold wire connections for greater reliability
  5. Built in power supply monitoring circuit with double reset function
  6. High speed Write and Page Write modes
  7. SPI bus compatibility for easy replacement
  8. Two package types available: SOP8 (6.2mm × 5.0mm × 1.71mm)
    and SOP-J8 (6.0mm × 4.9mm × 1.75mm)

・ Series Lineup

Capacity
(bits)
Configuration
(bits)
Part Number Operating
Voltage
Range
(V)
Rewrite
Frequency
(occurrences)
SOP8 SOP-J8 85℃
or
less
125℃
or
less
1K 128×8 BR25H010F-W BR25H010FJ-W 2.5 to 5.5 1 million 300,000
2K 256×8 BR25H020F-W BR25H020FJ-W 2.5 to 5.5 1 million 300,000
4K 512×8 BR25H040F-W BR25H040FJ-W 2.5 to 5.5 1 million 300,000
8K 1K×8 BR25H080F-W BR25H080FJ-W 2.5 to 5.5 1 million 300,000
16K 2K×8 BR25H160F-W BR25H160FJ-W 2.5 to 5.5 1 million 300,000
32K 4K×8 BR25H320F-W BR25H320FJ-W 2.5 to 5.5 1 million 300,000


・ Glossary

  • Non-volatile memory
    Memory that can be written to but will not be erased during power OFF. Included in this category are EEPROMs, in which data can be rewritten electronically, and Flash memory, in which data can be erased by batch and can be rewritten very rapidly.
  • Double-cell
    Rewriting in an EEPROM is performed by passing electrons through a tunnel oxide film. This places stress on the device and after many rewrites, the oxide film invariably degrades. Once degraded, the memory cells are fixed with the data value “1” and can no longer be written to. ROHM's double-cell construction connects two memory cells in an OR configuration so that if one cell becomes defective, the other cell will operate normally and allow data to be rewritten. This double-cell construction is used in all ROHM EEPROMs.
  • Double reset function
    The internal circuit ICs and LSIs become extremely unstable during power ON/OFF. ROHM's EEPROMs feature two circuits (power ON reset and low voltage malfunction prevention circuits) that detect low voltage states during power interruption or when turned ON or OFF and reset the internal circuitry, preventing writing errors.
  • SPI bus
    A four wire serial interface developed by Motorola consisting of data lines, a serial clock, and chip select that greatly reduces the number of signal lines required. Primarily used to connect Flash memory, it is used in ECUs equipped with microcontrollers.
  • Electrostatic discharge resistance (ESD)
    Refers to the amount of electrostatic voltage that can be withstood without causing damage.
  • ECU
    A microcontroller mounted in a vehicle that enables electronic control of a particular system (i.e. engine, AT, ABS).
  • Screening
    A process for detecting and removing products with initial and incidental defects. This process includes acceleration (aging) tests performed on products not exposed to stress during the manufacturing process that were properly shipped as non-defective items. These acceleration tests add stress to detect latent defects without actually causing degradation or damage.
  • Debugging
    Debugging refers to a sequence of operations that identifies the causes of structural defects through analysis of defective items, provides feedback for processes, and improves product quality.
  • Incidental defects
    Defects that occur after the initial period throughout normal use. It is believed that a major cause is excessive accidental surge voltage.
  • Page Write mode
    This function allows simultaneous writing of a maximum of 32 bytes of data in a single operation. It can be used to shorten the initial write time. The maximum number of pages that can be written varies depending on the memory capacity: 16 bytes with 1K to 4K, 32 bytes with 8K to 32K.
Products EEPROM
Please do not hesitate to contact us if you need further information about the SPI-compatible 125℃ Double Cell EEPROMs